A5 - SIMD

image: T Latham, lecture slides
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single instruction can be issued to operate on multiple elements of an array or vector
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it does not always mean multiple parallel cores
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for modern processors, ensuring efficient vectorisation is essential for optimising code
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Streaming SIMD Extensions (SSEs) allow a single instruction to be issues, that operates on all data in small vector registers
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Advanced Vector Extensions (AVEs) and its successors and later equivalents extend the size of these registers